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d a t a sh eet product speci?cation file under integrated circuits, ic02 january 1990 integrated circuits SAA1101 universal sync generator (usg)
january 1990 2 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 features programmable to seven standards additional outputs to simplify signal processing can be synchronized to an external sync. signal option to select the 524/624 line mode instead of the 525/625 line mode lock from subcarrier to line frequency general description the SAA1101 is a universal sync generator (usg) and is designed for application in video sources such as cameras, film scanners, video generators and associated apparatus. the circuit can be considered as a successor to the saa1043 sync generator and the saa1044 subcarrier coupling ic. quick reference data ordering and package information notes 1. sot117-1; 1996 december 02. 2. sot136-1; 1996 december 02. symbol parameter min. max. unit v dd supply voltage range (pin 28) 4.5 5.5 v i dd quiescent supply current - 10 m a f osc clock oscillator frequency - 24 mhz extended type number package pins pin position material code SAA1101p 28 dil plastic sot117 (1) SAA1101t 28 so28 plastic sot136a (2)
january 1990 3 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 k , full pagewidth mgh191 combining logic vertical divider reset pulse shaper addition/ suppression logic standard programmed divider line divider horizontal detection vertical detection vertical lock subcarrier divider subcarrier subtraction lock mode selection phase detection 18 17 16 15 22 21 20 19 cs cb bk id hd vd wmp clp 12 rr 7 vle 11 ecs f s - d f f s d f f h h ref 40f h hri f h 2f h 160f h prescaler SAA1101 8 14 28 910 ph lm1 lm0 norm si 13 23 24 3 4 cs1 clo cs0 v ss v dd x y z fso fsi osco osci 25 26 27 2 1 6 5 fig.1 block diagram.
january 1990 4 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 functional description generation of pulses generation of standard pulses such as sync, blanking and burst for tv systems: pal b/g, paln, palm, secam and ntsc. in addition a number of non-standard pulses have been supplied to simplify signal processing. these signals include - horizontal drive, vertical drive, clamp pulse, identification etc. it is possible to select the 524/624 line mode instead of the 525/625 line mode for all the above tv systems for applications such as robotics, games and computers. fig.2 pinning configuration; sot117. f page fsi fso cs1 cs0 osci osco vle ph lm1 lm0 ecs rr si v ss v dd z y x norm hd clo vd wmp clp cs cb bk id 1 2 3 4 5 6 7 8 9 10 11 12 13 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 SAA1101 mgh190 pinning symbol pin description fsi 1 subcarrier oscillator input, where f max = 5 mhz fso 2 subcarrier oscillator output cs1 3 clock frequency selection - cmos input cs0 4 clock frequency selection - cmos input osci 5 clock oscillator input, where f max = 24 mhz osco 6 clock oscillator output vle 7 vertical in-lock enable - cmos input ph 8 phase detector output - 3-state output lm1 9 lock mode selection - cmos input lm0 10 lock mode selection - cmos input ecs 11 external composite sync. signal - cmos schmitt-trigger input rr 12 frame reset - cmos schmitt-trigger input si 13 set identi?cation, used to set the correct ?eld sequence in pal-mode. the correction (inversion of fh2) is done at the left-hand slope of the si-pulse. minimum pulse width is 800 ns. cmos schmitt-trigger input. v ss 14 ground id 15 identi?cation - push-pull output bk 16 burst key (pal/ntsc), chroma-blanking (secam) - push-pull output cb 17 composite blanking - push-pull output cs 18 composite sync. - push-pull output clp 19 clamp pulse - push-pull output wmp 20 white measurement pulse-3-state output vd 21 vertical drive pulse - push-pull output hd 22 horizontal drive pulse - push-pull output norm 23 used with x, y and z to select tv system; norm = 0, 625/525 line mode (standard); norm = 1, 624/524 line mode - cmos input clo 24 clock output - push-pull output x 25 tv system selection input - cmos input y 26 tv system selection input - cmos input z 27 tv system selection input - cmos input v dd 28 voltage supply
january 1990 5 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 lock modes the usg offers four lock modes: lock from the subcarrier slow sync. lock, external h ref slow sync. lock, internal h ref fast sync. lock, internal h ref lock from subcarrier lock from subcarrier to the line frequency for the above mentioned tv systems is given below; the horizontal frequency (f h ) = 15.625 khz for 625 line systems and 15.734264 khz for 525 line systems. these relationships are obtained by the use of a phase locked loop and the internal programmed divider chain, see fig.3(a). lock to an external signal source the following methods can be used to lock to an external signal source: 1. sync. lock slow; the line frequency is locked to an external signal. the line and frame information are extracted from the external sync. signal and used separately in the lock system. the line information is used in a phase-locked loop where external and internal line frequencies are compared by the same phase detector as is used for the subcarrier lock. the external frame information is compared with the internal frame in a slow lock system; mismatch of internal and external frames will result in the addition or suppression of one line depending on the direction of the fault. the maximum lock time for frame lock is 6.25 s, see fig.3(b). 2. sync. lock fast. a fast lock of frames is possible with a frame reset which is extracted out of the incoming external sync. signal, see fig.3(c). 3. sync. lock with external reference. lock of an external sync. signal to the line frequency with an external line reference to make possible a shifted lock. the secam (1 and 2) 282f h paln 229.2516f h ntsc (1 and 2) 227.5f h palm 227.25f h pal b/g 283.7516f h subcarrier input is, in this case, used as an external input for the horizontal reference, see fig.3(d). selection of lock mode lock mode is selected using the inputs lm0 and lm1 as illustrated in the table below. lm0 lm1 selection 0 0 lock to subcarrier 0 1 slow sync. lock external h ref 1 0 slow sync. lock internal h ref 1 1 fast sync. lock internal h ref
january 1990 6 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 the different lock modes are illustrated by the following figures: fig.3 (a) lock to subcarrier. fig.3 (b) slow sync lock, internal h ref fig.3 (c) fast sync lock, internal h ref fig.3 (d) slow sync lock, external h ref handbook, halfpage mgh193 n f h line oscillator fso fsi osco osci SAA1101 sub- carrier oscillator ph lm1 lm0 logic 0 logic 1 10 65 8 2 1 9 handbook, halfpage mgh194 n f h line oscillator ecs osco osci SAA1101 ph lm1 lm0 logic 0 logic 1 10 65 8 11 9 handbook, halfpage mgh195 n f h line oscillator ecs osco osci SAA1101 ph lm1 lm0 logic 1 logic 1 10 65 8 11 9 handbook, halfpage mgh192 n f h line oscillator t h ref ecs fsi h d osco osci SAA1101 ph lm1 lm0 logic 0 logic 1 10 65 8 22 11 1 9
january 1990 7 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 lock with horizontal and vertical signals (slow lock modes only) it is possible to use horizontal and vertical signals instead of composite sync signals. the connections in this situation are: the external horizontal signal is connected to the ecs input (pin 11) and the vertical signal to the rr input (pin 12). the high time of the horizontal pulse must be less than 14.4 m s, otherwise it will be detected as being a vertical pulse and will corrupt the vertical slow lock system. selection of clock frequency the clock frequency is selected using the cs0 and cs1 inputs as illustrated below. where the horizontal frequency, f h = 15.625 khz for 625 lines and 15.734264 khz for 525 lines. oscillators the subcarrier oscillator has fsi as its input and fso as its output. it is always used as a crystal oscillator with a series resonance crystal with parallel load capacitor. the maximum frequency, f max = 5 mhz and the load capacitor, c l =10 < c l < 35 pf. the clock oscillator has osci as its input and osco as its output. it can be used with an lc oscillator or a series resonance crystal with parallel load capacitor (fig.4). the maximum frequency, f max = 24 mhz and the load capacitor, c l = 10 < c l < 35 pf. selection of 625/525 (standard; interlaced mode) or 624/524 lines (non-interlaced mode) selection is achieved using the norm input. when norm = 0, 625/525 (standard) lines are selected; when norm = 1, 624/524 line are selected. output dimensions all push-pull outputs: standard output 2 ma. white measurement pulse, wmp: 3-state output 2 ma. phase detector, ph: 3-state output 2 ma. cs0 cs1 frequency 625 lines 525 lines units 0 0 160f h 2.5 2.517482 mhz 0 1 160f h 5 5.034964 mhz 1 0 960f h 15 15.104893 mhz 1 1 1440f h 22.5 22.657340 mhz
january 1990 8 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 selection of tv system selection of the required tv system is achieved by the x, y and z inputs as illustrated by the following table. limiting values limiting values in accordance with the absolute maximum system (iec 134) note 1. input voltage should not exceed 7 v. system xy z secam1 0 0 0 paln 0 0 1 ntsc1 0 1 0 palm 0 1 1 secam2 1 0 0 (with identi?er) pal b/g 1 0 1 ntsc2 1 1 0 (short blanking) symbol parameter min. max. unit v dd supply voltage - 0.5 + 7v v i input voltage - 0.5 v dd + 0.5 (1) v i i maximum input current - 10 ma i o maximum output current - 10 ma i dd maximum supply current in v dd - 25 ma p tot maximum power dissipation - 400 mw t stg storage temperature range - 55 + 150 c fig.4 crystal oscillator circuit. handbook, halfpage mgh196 SAA1101 6 5 500 k w 1 k w 39 pf 39 pf 15 mhz osci osco
january 1990 9 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 characteristics v dd = 4.5 to 5.5 v; t amb = - 25 to + 70 c unless otherwise speci?ed symbol parameter conditions min. typ. max. unit supplies v dd supply voltage 4.5 - 5.5 v i dd supply current (quiescent) t amb = 25 c -- 10 m a inputs i i input leakage current t amb = 25 c -- 100 na cmos compatible; x, y, z, norm, cs0, cs1, lm0, lm1 and vle v ih input voltage high 0.7v dd -- v v il input voltage low -- 0.3v dd v schmitt trigger inputs; ecs, rr and si v t + positive-going threshold - 2.5 4 v v t - negative-going threshold 1 1.5 - v v h hysteresis 0.4 1 - v oscillator inputs; osci and fsi v ih input voltage high 0.7v dd -- v v il input voltage low -- 0.3v dd v outputs push-pull outputs; cb, cs, bk, id, hd, vd, clp and clo v oh output voltage high - i o = 2 ma; v dd = 5 v 4.5 -- v v ol output voltage low i o = 2 ma; v dd = 5 v -- 0.5 v oscillator outputs; osco and fso v oh output voltage high - i o = 0.75 ma; v dd = 5 v 4.5 -- v v ol output voltage low i o = 0.75 ma; v dd =5 v -- 0.5 v 3-state outputs; wmp and ph v oh output voltage high - i o = 2 ma; v dd = 5v 4.5 -- v v ol output voltage low i o = 2 ma; v dd = 5v -- 0.5 v i oz off-state current t amb = 25 c -- 50 na
january 1990 10 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 output waveforms the output waveforms for the different modes of operation are illustrated by figs 5 and 6. 25h + t wcb f ull pagewidth mgh198 1st half picture 2nd half picture 1st half picture 2nd half picture 1st half picture 2nd half picture 3rd half picture 4th half picture 1st half picture 2nd half picture 1st half picture 2nd half picture id id bk bk bk bk secam - 1 ccir/pal bk bk cb cb vd cs cs 9h (1) 10h t wcb start half picture (1) h = 1 horizontal scan. fig.5 typical output waveforms for pal/ccir and secam. in the 624-line mode the output waveforms are identical to the first half picture of pal/ccir and are not interlaced.
january 1990 11 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 21h + t wcb u ll pagewidth mgh197 1st half picture 2nd half picture 1st half picture 2nd half picture 1st half picture 2nd half picture 1st half picture 2nd half picture 3rd half picture 4th half picture 1st half picture 2nd half picture cb cb ntsc 2 (2 ) bk bk bk bk pal - m bk bk ntsc 1 + 2 (2) cb cb vd ntsc 1 (2) cs cs 19h + t wcb 9h 6h t wcb start half picture 11h (1) (1) h = 1 horizontal scan. (2) ntsc mode reset; the fourth half picture is identical to the second half picture for ntsc. fig.6 typical output waveforms for ntsc and pal-m. in the 524-line mode the output waveforms are identical to the first half pic ture of ntsc and are not interlaced.
january 1990 12 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 waveform timing the waveform timing depends on the frequency of the oscillator input (f osci ). this is illustrated in the table below as the number (n) of oscillations at osci. the timings are derived from n t osci 100 ns. one horizontal scan (h) = 320 t osci =1/f h . where t osci = 200 ns for pal/secam and 198.6 ns for ntsc/pal-m symbol parameter pal ntsc pal-m secam unit n composite sync (cs) t wsc1 horizontal sync pulse width 4.8 4.77 4.77 4.8 m s24 t wsc2 equalizing pulse width 2.4 2.38 2.38 2.4 m s12 t wsc3 serration pulse width 4.8 4.77 4.77 4.8 m s24 - duration of pre-equalizing pulses 2.5 3 3 2.5 h - - duration of post-equalizing pulses 2.5 3 3 2.5 h - - duration of serration pulses 2.5 3 3.5 2.5 h - composite blanking (cb) horizontal blanking pulse width t wcb pal/secam/pal-m 12 - 11.12 12 m s60 t wcb ntsc1 - 11.12 --m s56 t wcb ntsc2 - 10.53 (note1) --m s53 front porch t pcbcs front porch 1.6 1.59 1.59 1.6 m s8 duration of vertical blanking - pal/secam/pal-m 25h + t wcb - 21h + t wcb 25h + t wcb -- - ntsc1 - 21h + t wcb ---- - ntsc2 - 19h + t wcb ---- burst key (bk) (not secam) t wbk burst key pulse width 2.4 2.38 2.38 -m s12 t pcsbk cs to burst key delay 5.6 5.56 5.76 -m s28 - burst suppression 9 9 11 - h - position of burst suppression - ?rst half picture h623 to h6 h523 to h6 h523 to h8 --- - second half picture h310 to h318 h261 to h269 h260 to h270 --- - third half picture h622 to h5 h523 to h6 h522 to h7 --- - fourth half picture h311 to h319 h261 to h269 h259 to h269 ---
january 1990 13 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 notes to the characteristics 1. horizontal blanking pulse width for ntsc2 can be 11.12 m s maximum 2. secam1, first half picture: 25h + t wbk except h320 to h328. second half picture: 24.5h + t wbk except h7 to h15. 3. secam2, first half picture: 25h + t wbk . second half picture: 24.5h + t wbk . burst key (bk) (secam) t wbk chroma pulse width --- 7.2 m s36 t pbkcs cs to chroma delay --- 1.6 m s8 duration of vertical blanking - secam1 --- note 2 -- - secam2 --- note 3 -- clamp pulse (clp) t wclp clamp pulse width 2.4 2.38 2.38 2.4 m s12 t pcsclp cs to clp delay 1.6 1.59 1.59 1.6 m s8 horizontal drive (hd) t whd pulse width 7.2 7.15 7.15 7.2 m s36 t phdcs cs to hd delay 0.8 0.79 0.79 0.8 m s4 - repetition period 64 63.56 63.56 64 m s - vertical drive (vd) - vd duration 10 6 6 10 h - t pvdcs cs to vd delay 1.6 1.59 1.59 1.6 m s8 white measurement pulse (wmp) - pulse width 2.4 2.38 2.38 2.4 m s12 - cs to wmp delay 34.4 34.16 34.16 34.4 m s 172 - duration of wmp 10 9 9 10 h - position of wmp - ?rst half picture h163 to h173 h134 to h143 h134 to h143 h163 to h173 -- - second half picture h475 to h485 h396 to h405 h396 to h405 h475 to h485 -- identi?cation (id) t wid pulse width 12 11.12 11.12 12 m s60 t pidcs cs to id delay 1.6 1.59 1.59 1.6 m s8 position of id - ?rst half picture h7 to h15 h8 to h22 h8 to h22 h7 to h15 -- - second half picture h320 to h328 h271 to h285 h271 to h285 h320 to h328 -- symbol parameter pal ntsc pal-m secam unit n
january 1990 14 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 fig.7 waveform timing. handbook, full pagewidth horizontal sync pulse equalizing pulse serration pulse horizontal blanking pulse burst key (pal) (secam) chrominance blanking horizontal drive clamp pulse secam identification start, stop vertical drives cs cb bk hd clp id vd composite sync composite blanking burst key/ chrominance blanking t wsc1 t wsc2 t wsc3 t wcb t pcbs2 t pcbsk t wbk t wbk t pbkcs t whd t phdcs t wcpl t pcsclp t wid t pidcs t pvdcs mla029
january 1990 15 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 package outlines unit a max. 1 2 b 1 (1) (1) (1) cd e w em h l references outline version european projection issue date iec jedec eiaj mm inches dimensions (inch dimensions are derived from the original mm dimensions) sot117-1 92-11-17 95-01-14 a min. a max. b z max. m e e 1 1.7 1.3 0.53 0.38 0.32 0.23 36.0 35.0 14.1 13.7 3.9 3.4 0.25 2.54 15.24 15.80 15.24 17.15 15.90 1.7 5.1 0.51 4.0 0.066 0.051 0.020 0.014 0.013 0.009 1.41 1.34 0.56 0.54 0.15 0.13 0.01 0.10 0.60 0.62 0.60 0.68 0.63 0.067 0.20 0.020 0.16 051g05 mo-015ah m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 28 1 15 14 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. handbook, full pagewidth dip28: plastic dual in-line package; 28 leads (600 mil) sot117-1
january 1990 16 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.30 0.10 2.45 2.25 0.49 0.36 0.32 0.23 18.1 17.7 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot136-1 x 14 28 w m q a a 1 a 2 b p d h e l p q detail x e z c l v m a e 15 1 (a ) 3 a y 0.25 075e06 ms-013ae pin 1 index 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.71 0.69 0.30 0.29 0.050 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 0 5 10 mm scale so28: plastic small outline package; 28 leads; body width 7.5 mm sot136-1 95-01-24 97-05-22
january 1990 17 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ic package databook (order code 9398 652 90011). dip s oldering by dipping or by wave the maximum permissible temperature of the solder is 260 c; solder at this temperature must not be in contact with the joint for more than 5 seconds. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (t stg max ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. r epairing soldered joints apply a low voltage soldering iron (less than 24 v) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 and 400 c, contact may be up to 5 seconds. so r eflow soldering reflow soldering techniques are suitable for all so packages. reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. w ave soldering wave soldering techniques can be used for all so packages if the following conditions are observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the longitudinal axis of the package footprint must be parallel to the solder flow. the package footprint must incorporate solder thieves at the downstream end. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. r epairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
january 1990 18 philips semiconductors product speci?cation universal sync generator (usg) SAA1101 definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.

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